Preferred mounting of MEMS chips is effected in a flip-chip arrangement on a substrate comprising electrical connections and, in particular, a wiring. The electrical connection between chip and substrate can comprise bumps which can consist of solder or gold, for example.
Preferably, at the lower edge of the chip facing the substrate, the gap between chip and substrate is closed. Various techniques have already been proposed for this purpose.
Commonly-assigned PCT patent document WO2005/102910 A1 and counterpart U.S. Patent Application Publication 2007/0222056 disclose, for example, a method wherein the chip bears on a support projecting above the substrate and the remaining gap is closed with a polymer or an electrically conductive composition by means of a jet printing method.
A further possibility is to cover the component under a covering film that is laminated thereon.
One disadvantage of the known encapsulation methods is that the mounting of the chip and the encapsulation thereof require a large number of processing steps that make the method complicated and hence costly.